diff options
| author | JF <jf@codingfield.com> | 2020-06-27 16:20:08 +0200 |
|---|---|---|
| committer | Gitea <gitea@fake.local> | 2020-06-27 16:20:08 +0200 |
| commit | 49bf12390bb27ca22a3cc5f472027344befc455e (patch) | |
| tree | 0a943e544cdb60565af9a5d6bfe6e372299068cb /src/FreeRTOS | |
| parent | 3a49bbbae48a62d5252fee0cb6d04002d917c820 (diff) | |
| parent | 4f9adb2372a71bab3c38684420cf90b1a99a6c9a (diff) | |
Merge branch 'develop' of JF/PineTime into master
Diffstat (limited to 'src/FreeRTOS')
| -rw-r--r-- | src/FreeRTOS/port_cmsis_systick.c | 8 | ||||
| -rw-r--r-- | src/FreeRTOS/portmacro_cmsis.h | 4 |
2 files changed, 10 insertions, 2 deletions
diff --git a/src/FreeRTOS/port_cmsis_systick.c b/src/FreeRTOS/port_cmsis_systick.c index 58c51bb7..b2cc14cd 100644 --- a/src/FreeRTOS/port_cmsis_systick.c +++ b/src/FreeRTOS/port_cmsis_systick.c @@ -251,6 +251,14 @@ void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) else #endif { + // Fix ERRATA 87 (https://infocenter.nordicsemi.com/index.jsp?topic=%252Fcom.nordic.infocenter.sdk5.v11.0.0%252Findex.html&cp=4_0_0) + // Clear FPU interrupt before going to sleep. This prevent unexpected wake-up. + #define FPU_EXCEPTION_MASK 0x0000009F + /* Clear exceptions and PendingIRQ from the FPU unit */ + __set_FPSCR(__get_FPSCR() & ~(FPU_EXCEPTION_MASK)); + (void) __get_FPSCR(); + NVIC_ClearPendingIRQ(FPU_IRQn); + /* No SD - we would just block interrupts globally. * BASEPRI cannot be used for that because it would prevent WFE from wake up. */ diff --git a/src/FreeRTOS/portmacro_cmsis.h b/src/FreeRTOS/portmacro_cmsis.h index 3d2dee5c..0497538f 100644 --- a/src/FreeRTOS/portmacro_cmsis.h +++ b/src/FreeRTOS/portmacro_cmsis.h @@ -106,8 +106,8 @@ extern void vPortEnterCritical( void ); extern void vPortExitCritical( void ); #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI() #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortSetBASEPRI(x) -#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI() -#define portENABLE_INTERRUPTS() vPortSetBASEPRI(0) +#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) +#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENTER_CRITICAL() vPortEnterCritical() #define portEXIT_CRITICAL() vPortExitCritical() |